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15 September 2026

Yield and manufacturing challenges for microLED micro-displays

Yield and manufacturing challenges for microLED micro-displays
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Soeren Steudel

Director of Technology Development

Ruisong BV

Yield and manufacturing challenges for microLED micro-displays

Why is it so difficult to ramp-up volume manufacturing of microLED microdisplay with decent yield and cost?
Tight pitch integration of compound semiconductor with advanced node CMOS like in microLED displays requires a full wafer level monolithic approach. Dedicated microLED display fabs are hereby an unlikely solution since older generation fabs used for compound semiconductor (e.g. 4”-6”) do not have the capability and precision while Si-CMOS fabs (e.g. 200mm/300mm) require a very large CAPEX that during the slow AR market ramp up would be under-utilized for several years. Process and tool compatibility to existing CMOS foundries is therefore a must.
At pitches below 5um, the CMOS bonding is at the center and cannot be considered as an afterthought of a great LED process. In this presentation we discuss different option for CMOS integration, color generation and how they influence cost effective volume manufacturing.

This video is a first 5 minutes sample.

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