Haico Kok | ASML: Does manufacturing billions of AR waveguides really require six times the capacity of TSMC?
45:54 - 47:35
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Summary of the clip:
Does manufacturing billions of AR waveguides really require six times the capacity of TSMC?
At SPIE, Jason Hartlove of Meta showed a slide claiming a billion waveguides would need six times TSMC. That comparison confuses wafer capacity—total wafer starts—with the number of process passes a wafer receives. A TSMC wafer goes through the whole process line 50 to 100 times because many layers are built. An AR wafer only goes up to five layers maybe, a factor of 20 difference. Simpler device.
You cannot compare a waveguide with a high-end chip. In a TSMC factory there are many different tools and processes: not only litho and etch, but deposition, anneal, CMP, implantation, and many metrology measurements. All of this stuff an AR wafer does not need. So the same fab would produce 20 to 100 more AR wafers than logic wafers. That makes the six-TSMC claim off.
The scaling misunderstanding therefore does not require many TSMCs; just a fraction of one is okay. That is not the problem. The open question then shifts from wafer starts to the lithography step: if TSMC could do it, can the litho supplier do it? The comparison with high-end logic fails because the AR device is much simpler, with fewer layers and far fewer process and metrology steps.
In this short video, you can learn:
* Meta's slide used total wafer starts, not the 50–100 process passes each TSMC wafer receives.
* An AR wafer may have up to five layers, giving a factor of 20 difference versus a high-end logic wafer.
* A TSMC fab's deposition, anneal, CMP, implantation and metrology steps are not needed for AR wafers, so one fab would produce 20–100 more AR wafers.
📋 **Clip Abstract** Jason Hartlove of Meta claimed a billion AR waveguides would need six times TSMC. The error is conflating wafer capacity with process passes: a TSMC wafer runs through the line 50–100 times, an AR wafer only up to five layers, and the same fab would output 20–100 more AR wafers, leaving only a fraction of one TSMC.
About the speaker:
* Speaker: Haico Kok
* Company: ASML
* Event: Eindhoven 2026
* Location: High Tech Campus, Eindhoven
#ARWaveguides, #WaferCapacity, #ProcessPasses, #MetrologyMeasurements, #ARDisplays, #SemiconductorManufacturing
This is a highlight of the presentation:
A Lithographer’s Perspective on Manufacturing Waveguide Combiners for AR Glasses
More Highlights from the same talk.
06:19 - 08:06
How fast can automated semiconductor lithography clusters pattern AR waveguide wafers?
How fast can automated semiconductor lithography clusters pattern AR waveguide wafers?
Litho is always used in combination with etch; the basic flow starts by spin-coating a wafer with photoresist. Exposure happens in the litho tool, while spin-coating occurs in a connected track. The resist is then developed, much like old-fashioned photography, leaving a patterned resist. That pattern is typically transferred into the material. In this case, it can be etched directly into glass or silicon carbide, either with a straight etch or a slanted etch to produce slanted gratings.
The track is always connected to the litho tool, together called a litho cluster. A bare wafer enters the track, moves through coating and litho develop, and simply comes out patterned. There are no manual steps in between; the process is fully automated. Throughput depends on the tool type, ranging between 200 wafers per hour and the highest system at over 400 wafers per hour.
At the fastest throughput, over 400 wafers per hour means a fully patterned wafer emerges every eight seconds. That cadence matters because the litho cluster output sets the pace before etching and later design choices. The next design parameter is grating pitch, moving from process flow into design. Automated cluster throughput and grating geometry together shape what can be manufactured.
In this short video, you can learn:
* Litho is always paired with etch, starting from spin-coated photoresist and ending with a pattern transferred into glass or silicon carbide.
* The track is permanently connected to the litho tool as a litho cluster, so bare wafers enter and fully patterned wafers exit with no manual steps.
* Throughput ranges from 200 to over 400 wafers per hour, with 400 wafers per hour equating to a fully patterned wafer every eight seconds.
📋 **Clip Abstract** The clip explains the basic litho process flow for patterning wafers, combining spin-coating, exposure, develop, and etch, including straight or slanted etches for slanted gratings. It then describes the automated litho cluster and its throughput, from 200 to over 400 wafers per hour, or one fully patterned wafer every eight seconds, before turning to grating pitch.
About the speaker:
* Speaker: Haico Kok
* Company: ASML
* Event: Eindhoven 2026
* Location: High Tech Campus, Eindhoven
#PhotoresistPatterning, #SlantedGratingEtch, #SiliconCarbideEtch, #LithoClusterThroughput, #ARWaveguides, #SemiconductorLithography
16:33 - 18:19
Why is silicon carbide highly attractive for AR waveguides, and what grating pitch does it require?
Why is silicon carbide highly attractive for AR waveguides, and what grating pitch does it require?
Silicon carbide is the high-refractive-index candidate everybody is talking about for AR waveguides, and it brings several benefits. One benefit is less often mentioned: it allows air gapless designs, which matters if you want lightweight, simple waveguides. The trade-off is that you lose the benefit of large field of view, but you get a very simple stack with two lenses, front and top. That combination makes silicon carbide very attractive.
You can calculate the required grating pitch by plugging in the refractive index of silicon carbide, which is 2.6. That gives 309 nanometers. The comparison between a green waveguide and a full-color waveguide is on the slide. Their pitches are not that different, because green's wavelength happens to sit between red and blue. So supporting full color does not make as much difference as one might expect. If you buy a tool, it is not cheap; you want it usable for some time.
For exit pupil expansion, the most basic architecture of such a waveguide always has three gratings: in and outcoupling, and then a turn grating. Its goal is to provide a bigger eye box and a uniform one, if possible. This is the architecture being discussed alongside silicon carbide's refractive index and the 309-nanometer grating pitch.
In this short video, you can learn:
* Silicon carbide's 2.6 refractive index gives a required grating pitch of 309 nanometers.
* Silicon carbide enables air gapless designs for lightweight, simple waveguides, but it trades away large field of view for a simple stack with two lenses.
* Green and full-color waveguide pitches are not that different because green's wavelength lies between red and blue, and the basic architecture uses three gratings, with a turn grating for a bigger, uniform eye box.
📋 **Clip Abstract** Silicon carbide is attractive for AR waveguides because its high refractive index enables air gapless, lightweight designs, albeit without large field of view. With an index of 2.6, the required grating pitch is 309 nanometers, and green versus full-color pitches differ little; exit pupil expansion relies on three gratings, including a turn grating for a bigger, uniform eye box.
About the speaker:
* Speaker: Haico Kok
* Company: ASML
* Event: Eindhoven 2026
* Location: High Tech Campus, Eindhoven
#SiliconCarbide, #GratingPitch, #AirGaplessDesign, #ExitPupilExpansion, #ARWaveguides, #AugmentedReality
12:45 - 14:42
How do you calculate the exact grating pitch required for an AR waveguide?
How do you calculate the exact grating pitch required for an AR waveguide?
The light engine sits over there, the eye here, and the beam hits the middle of the field of view roughly perpendicular to the incoupling grating. The grating diffracts it by the diffraction angle, so the grating equation gives that angle. The diffraction angle has room to play with, but it must sit between two boundaries: total internal reflection and a practical maximum.
Many in the literature take the maximum angle as 90 degrees, which makes it nonsensical: that light would just continue, never hit the outcoupling grating, or the exit pupils would be so far apart that imaging gets very nasty. So a maximum angle is included, set at 70 degrees. The total internal reflection condition is one over the refractive index; averaging the two angles gives the basic pitch equation.
If you plug in green for a green waveguide, with a high refractive index glass of index two, and put the angle at 70, the result is 370 nanometer grating pitch. Lovely. The basic pitch equation only contains the wavelength, the field of view the eyepiece is supposed to handle, and the refractive index of the material. The calculation starts from the grating equation, constrains the diffraction angle, then averages the two boundaries.
In this short video, you can learn:
* The diffraction angle must lie between the total internal reflection angle and a practical maximum, set at 70 degrees.
* Taking 90 degrees as the maximum is nonsensical because light never hits the outcoupling grating or exit pupils become too far apart.
* For green in high-index glass with index two and a 70-degree angle, the grating pitch is 370 nanometers.
📋 **Clip Abstract** A grating equation sets the diffraction angle for an incoupling grating, bounded by total internal reflection and a practical maximum of 70 degrees. Averaging those limits yields a basic pitch equation; for green light in index-two glass it gives a 370 nanometer grating pitch.
About the speaker:
* Speaker: Haico Kok
* Company: ASML
* Event: Eindhoven 2026
* Location: High Tech Campus, Eindhoven
#GratingPitch, #IncouplingGrating, #TotalInternalReflection, #GratingPitch370nm, #ARWaveguides, #DiffractiveOptics