top of page

Henri van Helleputte

ASML

* All members of the platform can watch the entire presentation.

 

Please register to become a member.

Henri van Helleputte | ASML: Can current lithography tools adapt to the extreme material and thickness variations demanded by diverse mainstream semiconductor markets?

04:38 - 06:50

Other snippets from this talk

Summary of the clip:

Can current lithography tools adapt to the extreme material and thickness variations demanded by diverse mainstream semiconductor markets?

The mainstream semiconductor market encompasses a wide array of technologies, including mature logic, analog, power devices, optical sensors, micro-LEDs, engineered optics, and photonics. Unlike advanced markets focused on critical dimension (CD) shrink, this segment prioritizes flexibility, demanding precise control over CD uniformity and line edge roughness, particularly for photonics devices and waveguide combiners.

Substrate requirements in these markets are highly diverse, moving beyond standard silicon to materials like high-reflective index glass, gallium arsenide, sapphire, and silicon carbide. Wafer thicknesses vary significantly, with engineered optics often requiring very thin substrates (down to 500µm, potentially 350µm for SiC) and micro-LEDs utilizing very thick ones. ASML tools are designed to handle this broad thickness range, supporting lot-to-lot interchangeability between 300µm and 1200µm, with potential shifts to even wider ranges.

In this short video, you can learn:
* The diverse technologies within the mainstream semiconductor market.
* The shift in focus from CD shrink to flexibility, CD uniformity, and line edge roughness control.
* The wide range of substrate materials (glass, SiC, GaAs, Sapphire) and thicknesses (thin to thick) required.
* ASML's lithography tools' capability to handle significant substrate thickness variations (300µm to 1200µm).

#LithographyTools, #WaferThickness, #HeterogeneousMaterials, #CDUniformity, #MicroLEDs, #IntegratedPhotonics

This is a highlight of the presentation:

AR/VR Connect 2025

MicroLED Connect 2025

Conference Centre, High Tech Campus, Eindhoven, Netherlands

Organised By:

TechBlick

MicroLED Industry Association

More Highlights from the same talk.

00:58 - 02:10

How does advanced lithography enable the next generation of AI chips and integrated optics?

How does advanced lithography enable the next generation of AI chips and integrated optics?

AI's market expansion is significantly driven by three core elements: photonics for light-based connectivity, power reduction through materials like gallium nitride (GaN), and advanced packaging techniques. The transition to 300mm GaN wafers, as seen in data centers, is crucial for reducing power consumption and will also benefit micro-LED processes.

Advanced packaging is essential for efficiently co-packaging AI chips. ASML is developing a new 2x reduction tool specifically for this purpose. This tool's capability to expose grayscale resist makes it particularly well-suited for manufacturing engineered optics, a critical component for future AI-driven devices.

In this short video, you can learn:
* The three primary drivers for AI market growth: photonics, power reduction via GaN, and advanced packaging.
* The role of 300mm GaN wafers in power reduction for data centers and micro-LED applications.
* ASML's new 2x reduction tool for advanced packaging and its utility for engineered optics using grayscale resist.

#AdvancedLithography, #AdvancedPackaging, #GalliumNitride, #EngineeredOptics, #AI, #MicroLED

09:47 - 11:20

What are the critical lithography challenges in achieving high-performance micro-LEDs, especially concerning light extraction and overlay?

What are the critical lithography challenges in achieving high-performance micro-LEDs, especially concerning light extraction and overlay?

For micro-LED manufacturing, key lithography requirements include excellent CD uniformity, crucial for light extraction efficiency (LEE), and precise overlay. Light extraction efficiency is paramount for directing light effectively, and achieving this often involves complex patterning on bonded wafers. Current industry discussions highlight the need for robust overlay capabilities to meet the stringent demands of future micro-LED devices.

ASML's i-line systems demonstrate strong overlay performance, typically achieving capabilities between 10 and 15 nanometers, which aligns with current and anticipated future device requirements. The company maintains a clear roadmap to address even smaller overlay needs. A critical aspect of micro-LED performance, light extraction efficiency, is directly influenced by the precision and uniformity of the lithographic patterning.

In this short video, you can learn:
* Key micro-LED lithography requirements: CD uniformity, light extraction efficiency (LEE), and overlay.
* The importance of LEE for effective light direction in micro-LED structures.
* ASML i-line systems' overlay capabilities (10-15nm) and future roadmap.
* The direct link between lithographic precision and light extraction efficiency.

#LithographyOverlay, #LightExtractionEfficiency, #CDUniformity, #ASMLiLine, #MicroLED, #ARVRDisplays

More Snippets
CONTACT US

KGH Concepts GmbH

Mergenthalerallee 73-75, 65760, Eschborn

+49 17661704139

venessa@techblick.com

TechBlick is owned and operated by KGH Concepts GmbH

Registration number HRB 121362

VAT number: DE 337022439

  • LinkedIn
  • YouTube

Sign up for our newsletter to receive updates on our latest speakers and events AND to receive analyst-written summaries of the key talks and happenings in our events.

Thanks for submitting!

© 2026 by KGH Concepts GmbH

bottom of page