Katsumi Araki | Toray Engineering: Should you build a 100% Known Good Die carrier or patch defects on the display substrate?
00:04:19 - 00:05:34
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Should you build a 100% Known Good Die carrier or patch defects on the display substrate?
To address mass-production yield bottlenecks, system integrators must choose between two distinct transfer architectures. The first approach relies on a hybrid laser-trimming and stamp pick-and-place method. Here, defective chips are pre-emptively trimmed from the donor substrate based on optical and electrical inspection data, allowing stamp pick-and-place heads to transfer only viable die to the backplane, while a dedicated laser tool replaces missing spots with known good die.
The alternative paradigm decouples transfer from final bonding by utilizing a temporary carrier. Laser-driven mass transfer is deployed to populate an intermediate carrier substrate exclusively with known good die (KGD). Once a 100% yielding carrier is fabricated, a high-throughput thermal compression or gang bonding machine transfers and secures the entire array onto the active matrix backplane.
Both pathways utilize specialized toolsets designed to hit high-accuracy alignment tolerances while reducing thermal budget exposure. By standardizing these two process flows, display manufacturers can select the optimal balance between initial capital equipment expense and final throughput, depending on target panel sizes and emitter pitches.
In this short video, you can learn:
* The architectural differences between stamp pick-and-place with laser trim and decoupled carrier-based bonding.
* How selective laser transfer is used to pre-populate intermediate carriers with 100% known good die.
* The mechanics of high-throughput gang bonding using zero-defect temporary carriers.
π **Clip Abstract** This segment introduces Toray's dual-route process solutions for high-yield MicroLED assembly. Katsumi Araki compares in-line laser repair during stamp transfer against an off-line intermediate carrier system to bypass post-assembly repair.
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#KnownGoodDie, #SelectiveLaserTransfer, #GangBonding, #StampPickAndPlace, #MicroLEDDisplay, #DisplayYieldManagement
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00:03:06 - 00:05:28
How do you scale perovskite solar cell manufacturing to 2.4-meter panels while keeping film non-uniformity under 3%?
How do you scale perovskite solar cell manufacturing to 2.4-meter panels while keeping film non-uniformity under 3%?
Scaling up perovskite solar cell fabrication from laboratory-scale spin coating to large-area industrial production requires precise control over both fluid dynamics and crystallization kinetics. The typical manufacturing flow involves depositing the perovskite precursor solution via slot-die coating, followed by a rapid vacuum quenching process to induce homogeneous supersaturation and subsequent crystallization.
A key technical challenge in slot-die coating is managing the fluid pressure and mechanical stability of the coating head across wide formats. To address this, specialized high-pressure pumps and precise gap-control systems are paired with a unique skeleton plate design inside the vacuum quench chamber, allowing uniform solvent evaporation across the entire surface of the panel.
By optimizing these thermodynamic and fluidic parameters, it is now possible to achieve uniform perovskite films on massive 2.4 m by 1.2 m glass substrates. This system manages to maintain a thickness variation of under 3% (typically around 2%), establishing a robust hardware pathway for the commercialization of large-format perovskite PV modules.
In this short video, you can learn:
* The three-step process flow of slot-die coating, vacuum quenching, and thermal annealing for perovskite films.
* How specialized skeleton plates and high-speed pumping systems ensure uniform crystallization during vacuum quenching.
* Actual uniformity data showing thickness variations under 3% on 2.4 m x 1.2 m glass substrates.
π **Clip Abstract** This clip details the precise process and hardware requirements for scaling perovskite solar cell fabrication to 2.4 m x 1.2 m glass substrates using slot-die coating and vacuum quenching. The speaker presents empirical data demonstrating how optimized fluid dynamics and solvent evaporation control can achieve film thickness variations of around 2%.
#SlotDieCoating, #VacuumQuenching, #PerovskiteCrystallization, #LargeAreaCoating, #PerovskitePhotovoltaics, #ThinFilmPV
00:12:45 - 00:14:18
Is it possible to scale wet-processed perovskite-silicon tandems to 1,000 wafers per hour without losing the efficiency edge over dry deposition?
Is it possible to scale wet-processed perovskite-silicon tandems to 1,000 wafers per hour without losing the efficiency edge over dry deposition?
Perovskite-silicon tandem cells represent the next frontier in photovoltaic efficiency, pushing past the theoretical single-junction silicon limit. While wet-chemical slot-die coating processes consistently yield higher power conversion efficiencies than physical dry deposition methods, they suffer from inherent throughput limitations in commercial production lines.
Because slot-die coating relies on a sheet-by-sheet or wafer-by-wafer handling mechanism, the spatial and temporal parameters of fluid deposition, solvent extraction, and thermal annealing naturally bottleneck cycle times. Bridging this productivity gap requires rethinking the transport mechanics and drying kinetics of the inline tools.
To make wet-processed tandems economically viable, manufacturers are designing high-throughput inline coating platforms. Current semi-pilot configurations achieve a cycle time of 400 wafers per hour, while next-generation mechanical architectures aim to process 1,000 wafers per hour, aligning wet-chemical perovskite deposition with modern silicon production speeds.
In this short video, you can learn:
* Why wet processing yields higher perovskite tandem cell efficiencies compared to dry physical vapor deposition.
* The mechanical and fluidic throughput bottlenecks of wafer-by-wafer slot-die coating systems.
* The scaling roadmap from R&D systems to high-throughput platforms aiming for 1,000 wafers per hour.
π **Clip Abstract** This clip addresses the critical productivity and throughput challenges of using wet-chemical slot-die coating for perovskite-silicon tandem cells. The speaker outlines the engineering path to scale processing speeds from 200 to 1,000 wafers per hour to match industrial silicon standards.
#SlotDieCoating, #PerovskiteSiliconTandems, #InlineCoating, #HighThroughputManufacturing, #PerovskitePhotovoltaics, #SolarManufacturing
00:10:27 - 00:12:15
Can wet-processed buffer layers replace evaporated C60 to achieve over 23% efficiency in commercial-scale perovskite modules?
Can wet-processed buffer layers replace evaporated C60 to achieve over 23% efficiency in commercial-scale perovskite modules?
The architecture of high-performance perovskite solar modules typically relies on a p-i-n (PIN) stack configuration. While thermal evaporation of fullerene (C60) electron transport layers (ETLs) has been the laboratory standard, transitioning to wet-processed alternatives like tin oxide (SnO2) offers a significantly lower cost-of-ownership and simplified inline manufacturing.
Through collaboration with advanced material partners, novel wet-processed tin oxide formulations are being implemented directly via slot-die coating. This approach eliminates the high vacuum overhead of C60 evaporation while maintaining excellent band-alignment and charge-extraction properties at the perovskite interface.
Experimental results validate this chemical approach, demonstrating a champion module efficiency of 23.67% on 300 mm x 300 mm substrates using a wet-processed tin oxide ETL. For larger 1.2 m x 0.6 m form factors, the PIN architecture maintains over 20% efficiency, proving that wet-chemistry alternatives can compete directly with physical vapor deposition.
In this short video, you can learn:
* The performance comparison between evaporated C60 and wet-processed tin oxide (SnO2) electron transport layers.
* Champion efficiency data reaching 23.67% on 300 mm x 300 mm and over 20% on 1.2 m x 0.6 m glass substrates.
* Key parameters of semitransparent ITO-only perovskite modules designed for tandem applications.
π **Clip Abstract** This segment discusses the transition from evaporated C60 to wet-deposited tin oxide as an electron transport layer in PIN-structure perovskite modules. The presenter shares certified champion efficiency records exceeding 23% and highlights scale-up performance on 1.2 m modules.
#SlotDieCoating, #TinOxideETL, #PINPerovskite, #LargeAreaPerovskites, #PerovskitePhotovoltaics, #TandemSolar