Tuomas Happonen | VTT: Does piling up flexible layers completely kill the stretchability of your elastic electronics?
00:18:57.422 - 00:19:57.432
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Summary of the clip:
Does piling up flexible layers completely kill the stretchability of your elastic electronics?
Thermoplastic polyurethane (TPU) is celebrated in the printed electronics industry for its exceptional flexibility and inherent stretchability. However, as circuit complexity increases and designers stack multiple TPU layers to route signals, the mechanical properties of the overall composite stack-up change dramatically.
When stacking four layers of standard 100-micron thick TPU, the total substrate thickness rapidly reaches 400 microns or more. This cumulative thickness significantly restricts the elastomer's stretchability, shifting the physical properties of the device from highly elastic to merely conformable.
To mitigate this mechanical stiffening, designers must optimize application-specific parameters, such as reducing the individual substrate thickness. Balancing electrical routing density with mechanical compliance remains one of the most critical trade-offs when designing next-generation wearable and structural electronics.
In this short video, you can learn:
* The critical relationship between stacking density, overall thickness, and mechanical stretchability.
* Why a 400-micron TPU stack-up behaves more as a conformable circuit than a highly elastic one.
* Engineering design trade-offs to optimize thin-film substrates for wearable applications.
π **Clip Abstract**
This clip discusses the mechanical limitations of stacking multiple TPU layers during the fabrication of stretchable electronics. It explores the delicate trade-off between complex circuit routing and retaining the original elasticity of thin-film elastomers.
π Link in comments π
#ThermoplasticPolyurethane, #StretchableElectronics, #MechanicalCompliance, #SubstrateThickness, #PrintedElectronics, #WearableElectronics
This is a highlight of the presentation:
Elastic Multilayer Printed Circuits
Future of Electronics RESHAPED USA 2026
10-11 June 2026
Computer History Museum, Mountain View, California, USA
Organised By:
TechBlick
More Highlights from the same talk.
00:06:14.712 - 00:07:51.472
Can we successfully replicate multilayer rigid PCB design rules in printed, stretchable electronics?
How do we overcome the routing bottlenecks of single-layer stretchable electronics without sacrificing mechanical compliance?
The transition from single-layer printed circuitry to complex, multi-layered stretchable architectures represents a major leap in design freedom. While printing conductive traces on thermoplastic polyurethane (TPU) substrates is a mature process, routing dense layouts requires vertical integration. By utilizing TPU substrates as the base, engineers can establish a reliable foundation for high-density stretchable interconnects.
Achieving reliable vertical interconnect access (via) structures in elastomeric stacks requires precise layer-by-layer lamination and registration. The process integrates secondary TPU layers, or TPU combined with hot-melt adhesives, which are perforated to create via pathways. Once laminated onto the primary printed substrate, these vias are filled with conductive ink during the subsequent printing pass, establishing robust Z-axis connectivity.
This sequential lamination and printing methodology enables the fabrication of highly complex, multi-layered flexible printed circuits (FPCs) containing up to four conductive layers. By repeating the perforation, lamination, and printing cycle, designers can implement diverse via architectures. This includes through vias, blind vias, stacked vias, and staggered vias, unlocking advanced routing topologies for next-generation wearable and structural electronics.
In this short video, you can learn:
* How to construct multi-layer printed electronics using sequential TPU lamination.
* The process of perforating and filling vias to establish reliable Z-axis connectivity.
* How to implement diverse via architectures, including blind, stacked, and staggered configurations.
π **Clip Abstract** The speaker explains how to fabricate multi-layer printed electronics by sequentially laminating perforated TPU substrates and printing conductive layers to form Z-axis connections. This iterative stacking method enables the integration of up to four conductive layers with various via configurations, including blind, stacked, and staggered vias.
π€ Speaker: Tuomas Happonen
π’ Company: VTT
π
Event: Future of Electronics RESHAPED USA 2026
π Location: Computer History Museum, Mountain View, California, USA
π Learn more at the next TechBlick event: https://www.techblick.com
#MultilayerElasticCircuits, #ThermoplasticPolyurethane, #MicroViaInterconnects, #ScreenPrintedConductives, #StretchableElectronics, #AdditiveElectronics
00:10:48.152 - 00:12:12.412
How do you inspect and verify the physical integrity of buried vias inside a fully laminated, opaque stretchable circuit?
How do you inspect and verify the physical integrity of buried vias inside a fully laminated, opaque stretchable circuit?
Characterizing multi-layer flexible substrates introduces a major inspection challenge because inner-layer traces and vertical interconnects have no direct line of sight. Traditional optical inspection is limited to top-surface topology, and basic electrical testing only confirms open/short status without revealing mechanical or structural vulnerabilities.
To solve this, advanced 3D X-ray microscopy has emerged as a crucial diagnostic tool for evaluating the structural quality of screen-printed micro-vias. This non-destructive technique delivers high-resolution, cross-sectional volumetric data across all laminated layers, showing exactly how conductive inks fill the via cavities.
Through 3D X-ray analysis, researchers can easily detect printing anomalies, such as ink clogging, voids, and shifting via diameters caused by substrate shrinkage during hot lamination. These visual insights are essential for optimizing lamination profiles and ensuring long-term interconnect reliability.
In this short video, you can learn:
* The limitations of optical and electrical inspection when dealing with buried multilayer features.
* How 3D X-ray imaging provides non-destructive cross-sectional validation of inner via structures.
* Identifying common processing defects like ink clogging and lamination-induced substrate shrinkage.
π **Clip Abstract**
This clip highlights the use of 3D X-ray inspection to analyze the internal via quality of laminated flexible electronics. It demonstrates how volumetric imaging exposes hidden processing errors and ensures robust layer-to-layer electrical connections.
π Link in comments π
#3DXRayMicroscopy, #BuriedVias, #StretchableCircuits, #ConductiveInks, #PrintedElectronics, #FlexibleHybridElectronics