Gyoujin Cho | Sungkyunkwan University: How do you print a multi-layer transistor with nanoparticle inks without it turning into a coffee stain?
07:22 - 09:13
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How do you print a multi-layer transistor with nanoparticle inks without it turning into a coffee stain?
The foundation of this all-printed transistor process is a core set of functional materials developed over 19 years of research. Professor Cho outlines the three key inks that enable their devices: a silver nanoparticle ink for conductive traces and electrodes, a barium titanate (BTO) ink serving as the high-k dielectric layer, and a carbon nanotube (CNT) ink that forms the active semiconductor channel. This specific combination of conductor, insulator, and semiconductor materials is the basis for their printed CMOS-like technology.
Fabricating a complete processor is a complex endeavor requiring eight distinct printing units operating in sequence on a roll-to-roll platform. This multi-step process involves optimizing not just the ink formulation but also the ink transfer dynamics from the printing plate to the flexible substrate. Furthermore, the drying time and temperature for each of the eight layers must be precisely controlled to ensure proper film formation and prevent interference with subsequent printed layers.
A critical scientific challenge in this process is controlling ink rheology to ensure high pattern fidelity and device uniformity. The speaker highlights the "coffee ring effect" as a major issue, where nanoparticles migrate to the edge of a drying droplet, leading to non-uniform layers and poor device performance. He explains that precisely engineering the rheological properties of the ink is paramount to overcoming this and other topological challenges, enabling consistent channel lengths down to 60-70 microns and minimizing threshold voltage variation to below 10%.
In this short video, you can learn:
* The specific material stack used: Silver (conductor), Barium Titanate (dielectric), and Carbon Nanotubes (semiconductor).
* The challenges of integrating an 8-layer printing process in a continuous roll-to-roll system.
* The importance of ink rheology in overcoming printing defects like the coffee ring effect to achieve high device uniformity.
š **Clip Abstract** This clip details the core materials and process challenges of creating transistors via roll-to-roll printing. Professor Gyoujin Cho explains his team's 19-year journey in optimizing silver, barium titanate, and carbon nanotube inks to overcome issues like the coffee ring effect and achieve uniform device performance.
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#PrintedTransistors, #RollToRollPrinting, #NanoparticleInks, #InkRheology, #PrintedElectronics, #FlexibleElectronics
This is a highlight of the presentation:
Sustainable Roll-to-Roll Printing Foundry for Realizing 4 Things: Internet of Things (IoT), Display of Things (DoT), Vision of Things (VoT), and Care of Things (CoT)
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04:23 - 06:04
Is Silicon's environmental cost its ultimate downfall for the IoT era?
Is Silicon's environmental cost its ultimate downfall for the IoT era?
The massive environmental burden of conventional silicon chip manufacturing is a critical bottleneck for the future of ubiquitous computing. Professor Cho highlights that producing billions of chips per day for edge AI and IoT applications using silicon is unsustainable, citing the hazardous waste, wastewater, and air emissions. He points out that a major fab like TSMC already has a significant carbon footprint, and scaling this model globally to meet the demand for trillions of devices presents an insurmountable environmental challenge.
The core value proposition of a "printing foundry" is its position as a sustainable manufacturing alternative. Unlike the subtractive and chemical-intensive processes of silicon fabrication, additive roll-to-roll printing is presented as a near-zero-waste process with no significant air emissions or wastewater. This makes it an environmentally friendly and sustainable manufacturing paradigm, uniquely suited for the high-volume, low-cost electronics that will define the next technological wave.
This approach requires a strategic repositioning of printed electronics versus silicon. The speaker clarifies that printed circuits are not meant to replace high-performance silicon in data centers or smartphones. Instead, they are targeted at the vast, emerging market of low-cost, disposable, or ubiquitous "sticker-like" processors needed for IoT, where the sheer volume of units required makes the environmental impact of production a critical, and often overlooked, design factor.
In this short video, you can learn:
* The staggering environmental impact of silicon fabs when scaled to meet IoT demand.
* How additive roll-to-roll printing offers a near-zero-waste, sustainable manufacturing alternative.
* The strategic market segmentation between high-performance silicon and high-volume printed electronics.
š **Clip Abstract** Professor Gyoujin Cho argues that the immense environmental cost of silicon manufacturing makes it unsuitable for the trillions of devices needed for the IoT era. He presents the roll-to-roll printing foundry as a sustainable, additive alternative for producing billions of low-cost processors with minimal environmental impact.
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#SiliconManufacturing, #RollToRollPrinting, #PrintingFoundry, #IoTProcessors, #PrintedElectronics, #AdditiveManufacturing
11:03 - 13:35
Can you really design and fabricate a 1700-transistor processor using a roll-to-roll printing press?
Can you really design and fabricate a 1700-transistor processor using a roll-to-roll printing press?
To transition from a lab-scale process to a genuine foundry model, Professor Cho's team has developed a comprehensive Process Design Kit (PDK). This toolkit, analogous to those used in the silicon industry, provides designers with standardized device libraries and, crucially, accurate device models. They have successfully implemented the BSIM3 model for their n-type and p-type printed transistors, achieving less than 1% error and allowing external designers to accurately simulate and lay out complex circuits before fabrication.
As a powerful proof-of-concept for their foundry's capabilities, the team designed and fabricated a "COVID processor" containing approximately 1700 transistors. This complex circuit, capable of executing simple instructions, was produced entirely through their roll-to-roll printing process, aside from the memory unit. This achievement marks a significant milestone in printed electronics, demonstrating a level of integration comparable to the historic Intel 4004 processor but realized through a fully additive, high-throughput manufacturing method.
The foundry's operation is built on an iterative feedback loop for continuous process optimization and yield improvement. The manufacturing process is designed as a circulating system where, after a design is printed, it is immediately tested. If the device yield falls below a 30% success threshold, the process is halted, and the performance data is fed back to engineers who optimize the ink's rheological properties or other process parameters, ensuring a robust and constantly improving manufacturing flow.
In this short video, you can learn:
* How a Process Design Kit (PDK) with BSIM3 models enables circuit design for printed electronics.
* The successful fabrication of a 1700-transistor processor using a fully roll-to-roll printing process.
* The use of a yield-based feedback loop to continuously optimize ink properties and printing parameters.
š **Clip Abstract** Professor Gyoujin Cho unveils his group's printed electronics foundry service, complete with a Process Design Kit (PDK) for circuit designers. He showcases a fully printed 1700-transistor processor, demonstrating a new level of integration and validating their iterative, yield-driven manufacturing process.
š Link in comments š
#RollToRollPrinting, #PrintedPDK, #PrintedTransistors, #YieldOptimization, #PrintedElectronics, #FlexibleElectronics